FT-8800R tech documentation
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== Head unit packet == | == Head unit packet == | ||
| - | The head unit continuously sends a 13-octet packet to the main unit, with a brief delay between each packet. Testing confirms that if this packet is not sent for some time (on the order of 1s), the main unit | + | The head unit continuously sends a 13-octet packet to the main unit, with a brief delay between each packet. Testing confirms that if this packet is not sent for some time (on the order of 1s), the main unit shutsdown. This "watchdog" basically activates if something were to break communication between the head unit and the main unit. Although the raw line coding of the packet is with 8-bit data words, display information is only encoded in the lower 7-bits of each word. The MSb is used as the synchronization bit and is 1 in the first octet only. |
The head unit sends a fairly raw representation of the input switches and dials. It does not seem to do any high level processing. The packet contains no CRC or any bits dependent on other bits outside of a single function group. | The head unit sends a fairly raw representation of the input switches and dials. It does not seem to do any high level processing. The packet contains no CRC or any bits dependent on other bits outside of a single function group. | ||
Revision as of 00:10, 25 January 2011
Contents |
Links
Technical
Pinouts
| Pin | Name | Description |
|---|---|---|
| 1 | MOD | Buffered Modulation (AF) Input (~2.2kΩ source impedance) |
| 2 | POWERSW | Active-low (pulled through 1KΩ resistor) momentary power switch signal |
| 3 | 9V | 9VDC regulated supply voltage for Panel Unit |
| 4 | GND | Ground |
| 5 | RXD | Head unit Asynchronous serial (19.2 kbps 8N1) Receive |
| 6 | TXD | Head unit Asynchronous serial (19.2 kbps 8N1) Transmit |
| Pin | Name | Description |
|---|---|---|
| 1 | SW2 | Matrix keypad column input |
| 2 | SW1 | Matrix keypad row input |
| 3 | 9V | 9VDC regulated supply voltage |
| 4 | GND | Ground |
| 5 | MIC | Electret microphone audio input |
| 6 | PTT | Active-low push-to-talk switch |
Protocol
Head unit packet
The head unit continuously sends a 13-octet packet to the main unit, with a brief delay between each packet. Testing confirms that if this packet is not sent for some time (on the order of 1s), the main unit shutsdown. This "watchdog" basically activates if something were to break communication between the head unit and the main unit. Although the raw line coding of the packet is with 8-bit data words, display information is only encoded in the lower 7-bits of each word. The MSb is used as the synchronization bit and is 1 in the first octet only.
The head unit sends a fairly raw representation of the input switches and dials. It does not seem to do any high level processing. The packet contains no CRC or any bits dependent on other bits outside of a single function group.
Except for the hyper-memory keys, the keypads are implemented with matrix multiplexing and/or resistor dividers. The head unit uses an ADC and seems to pass these counts unmodified to the main unit which must deal with range checking. The specified count values below were recorded with an actual unit, but it should be obvious what the "nominal" values are, and since the resistor dividers are on the schematic, it is easy to cross-check.
| Parameter (Unit) | Description | Value |
|---|---|---|
| Communication | Asynchronous communication | 19.2 kbps 8-N-1 (8 data bits, no parity, 1 stop bit) |
| Head unit update period (ms) | Time between start of panel unit
TX packet to start of next packet | TBD (on order of 20) |
| Main unit update period (ms) | Time between start of main unit
TX packet to start of next packet | TBD (on order of 40) |
| Watchdog Time (s) | Minimum time between last update packet
from panel unit and when main unit shutdowns (powers off) | TBD |
TODO: Information for encoder dial button signal and WIRES (DXKEY) is missing.
| Octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
|---|---|---|---|---|---|---|---|---|
| 0 | Left encoder count since update
(2's complement - CW is positive) | SBO | ||||||
| 1 | Right encoder count since update
(2's complement - CW is positive) | SBZ | ||||||
| 2 | PTT input ADC
| SBZ | ||||||
| 3 | Right squelch ring ADC (7Fh: open squelch) | SBZ | ||||||
| 4 | Right volume control ADC (7Fh: max volume) | SBZ | ||||||
| 5 | SW1 keypad matrix row ADC
| SBZ | ||||||
| 6 | Left squelch ring ADC (7Fh: open squelch) | SBZ | ||||||
| 7 | Left volume control ADC (7Fh: max volume) | SBZ | ||||||
| 8 | SW2 keypad matrix column ADC
| SBZ | ||||||
| 9 | Panel right-side (multiplexed) buttons
| SBZ | ||||||
| 10 | Panel left-side (multiplexed) buttons
| SBZ | ||||||
| 11 | SET key | SBZ | ||||||
| 12 | Hyper-memory key
| |||||||
Main unit Packet
The main unit continuously sends a 42-byte packet to the panel unit. This packet essentially contains a raw bitmap indicating what LCD display segments should be illuminated. There seems to be no other higher level coding included in this packet. Although the raw line coding of the packet is with 8-bit data words, display information is only encoded in the lower 7-bits of each word. The MSb is used as the synchronization bit.
Testing confirms there is no CRC or other dependent bits in the packet. Each bit has been demonstrated to be independent. Although the main unit will only activate segments in certain ways, the panel is essentially a dumb terminal and will accept any type of bitmap combination.
| Signal | Description |
|---|---|
| Most segments are duplicated on left-and-right (indicated by subscript) | |
| Digits are numbered least-significant to most significant (right to left)
starting at 0. | |
| The 14-segment displays used only have 13 addressable segments. There is only one
addressable vertical segment. | |
| F | Frequency/Alpha 14-Segment displays |
| C | Channel 7-segment displays |
| SM | S-Meter segments (right-to-left) |
| BUSY | Busy channel indicator |
| MAIN | "Main" Band indicator |
| PMS | Preferential Memory Scan Flag (Left-pointing arrow) |
| SKIP | Skip Memory channel flag |
| ENC | Tone encoder flag |
| DEC | Tone decoder flag |
| DCS | Digital Code Squelch flag |
| 9600 | 9600bps Packet mode flag |
| PL | Low TX Power flag |
| PM | Medium TX Power flag |
| TX | Transmitter active flag |
| SET | Set mode active flag |
| LOCK | Keypad lock flag |
| APO | Auto power-off enable flag |
| PLUS | Plus repeater shift flag |
| MINUS | Minus repeater shift flag |
Missing Information
- MUTE, DCS, 9600 flags - These are in some of the unassigned bit position (need to recheck)
- Display brightness - There is a dimmer setting, and the value must be conveyed in the packet somewhere.
| Octet | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 0 | U? | APO | PML | FL.0.DP | SML.8 | FL.0.A | FLL.0.B | SBO | FL.0.C | FL.0.D | FL.0.E | FL.0.F | FL.0.G | PLL | FL.0.H | SBZ |
| 2 | FL.0.I | FL.0.J | SML.7 | FL.0.K | FL.0.L | FL.0.M | SML.6 | SBZ | FL.1.A | FL.1.B | FL.1.C | FL.1.D | FL.1.E | FL.1.F | FL.1.G | SBZ |
| 4 | A? | FL.1.H | FL.1.I | FL.1.J | SML.5 | FL.1.K | FL.1.L | SBZ | FL.1.M | SML.4 | FL.2.A | FL.2.B | FL.2.C | FL.2.D | FL.2.E | SBZ |
| 6 | FL.2.F | FL.2.G | A? | FL.2.H | FL.2.I | FL.2.J | SML.3 | SBZ | FL.2.K | FL.2.L | FL.2.M | U? | U? | U? | U? | SBZ |
| 8 | FL.3.DP | A? | SML.2 | FL.3.A | FL.3.B | FL.3.C | FL.3.D | SBZ | FL.3.E | FL.3.F | FL.3.G | A? | FL.3.H | FL.3.I | FL.3.J | SBZ |
| 10 | SML.1 | FL.3.K | FL.3.L | FL.3.M | SML.0 | FL.4.A | FL.4.B | SBZ | FL.4.C | FL.4.D | FL.4.E | FL.4.F | FL.4.G | MTL | FL.4.H | SBZ |
| 12 | FL.4.I | FL.4.J | BUSYL | FL.4.K | FL.4.L | FL.4.M | U? | SBZ | FL.5.A | FL.5.B | FL.5.C | FL.5.D | FL.5.E | FL.5.F | FL.5.G | SBZ |
| 14 | U? | FL.5.H | FL.5.I | FL.5.J | U? | FL.5.K | FL.5.L | SBZ | FL.5.M | U? | U? | U? | U? | U? | U? | SBZ |
| 16 | U? | U? | PMR | FR.0.DP | SMR.8 | FR.0.A | FLR.0.B | SBZ | FR.0.C | FR.0.D | FR.0.E | FR.0.F | FR.0.G | PLR | FR.0.H | SBZ |
| 18 | FR.0.I | FR.0.J | SMR.7 | FR.0.K | FR.0.L | FR.0.M | SMR.6 | SBZ | FR.1.A | FR.1.B | FR.1.C | FR.1.D | FR.1.E | FR.1.F | FR.1.G | SBZ |
| 20 | A? | FR.1.H | FR.1.I | FR.1.J | SMR.5 | FR.1.K | FR.1.L | SBZ | FR.1.M | SMR.4 | FR.2.A | FR.2.B | FR.2.C | FR.2.D | FR.2.E | SBZ |
| 22 | FR.2.F | FR.2.G | A? | FR.2.H | FR.2.I | FR.2.J | SMR.3 | SBZ | FR.2.K | FR.2.L | FR.2.M | U? | U? | U? | U? | SBZ |
| 24 | FR.3.DP | A? | SMR.2 | FR.3.A | FR.3.B | FR.3.C | FR.3.D | SBZ | FR.3.E | FR.3.F | FR.3.G | A? | FR.3.H | FR.3.I | FR.3.J | SBZ |
| 26 | SMR.1 | FR.3.K | FR.3.L | FR.3.M | SMR.0 | FR.4.A | FR.4.B | SBZ | FR.4.C | FR.4.D | FR.4.E | FR.4.F | FR.4.G | MTR | FR.4.H | SBZ |
| 28 | FR.4.I | FR.4.J | BUSYR | FR.4.K | FR.4.L | FR.4.M | KEY2 | SBZ | FR.5.A | FR.5.B | FR.5.C | FR.5.D | FR.5.E | FR.5.F | FR.5.G | SBZ |
| 30 | SET | FR.5.H | FR.5.I | FR.5.J | LOCK | FR.5.K | FR.5.L | SBZ | FR.5.M | U? | U? | U? | U? | U? | U? | SBZ |
| 32 | MAINR | TXR | PLUSR | MINUSR | ENCR | DEC R | PMSR | SBZ | SKIPR | CR.0.C | CR.0.B | CR.0.G | CR.0.A | CR.0.E | CR.0.F | SBZ |
| 34 | CR.0.D | CR.2.D | CR.1.C | CR.1.B | CR.1.G | CR.1.A | CR.1.E | SBZ | CR.1.F | CR.1.D | CR.DSH | CR.2.C | CR.2.B | CR.2.G | CR.2.A | SBZ |
| 36 | CR.2.E | CR.2.F | MAINL | TXL | PLUSL | MINUSL | ENCL | SBZ | DECL | PMSL | SKIPL | CL.0.C | CL.0.B | CL.0.G | CL.0.A | SBZ |
| 38 | CL.0.E | CL.0.F | CL.0.D | A? | CL.1.C | CL.1.B | CL.1.G | SBZ | CL.1.A | CL.1.E | CL.1.F | A? | U? | U? | U? | SBZ |
| 40 | U? | U? | CL.2.C | CL.2.B | CL.2.G | CL.2.A | CL.2.E | SBZ | CL.2.F | CL.2.D | U? | U? | U? | U? | U? | SBZ |
